A CMOS image sensor sets an electronic shutter state and a read state within one horizontal scanning interval in an imaging process, and includes a decoder circuit for performing control.
Jpn. Pat. Appln. KOKAI Publication No. 2005-184358 discloses the following CMOS image sensor. The CMOS image sensor includes several decoder circuits equivalent to the number of setting times of an electronic shutter state and a pixel read state every horizontal row of an imaging area. For this reason, the circuit scale becomes large.
An electronic shutter interval (storage interval) is equivalent to the timing difference between a start timing of an electronic shutter operation and a start timing of a pixel read operation. Therefore, if an electronic shutter interval is changed from short setting to long setting, there is a possibility that two kinds of electronic shutter intervals having different start timing overlap. In order to prevent the foregoing overlap, two pixel rows must be simultaneously selected. For this reason, a conventional CMOS image sensor is previously provided with two decoder circuits having the same circuit configuration. These decoder circuits set and control an electronic shutter state every horizontal row of an imaging area. The CMOS image sensor uses the foregoing two decoder circuits simultaneously or alternately when preventing the foregoing overlap. However, if two decoder circuits are prepared for each horizontal row, the circuit scale becomes large.
Moreover, the conventional CMOS image sensor includes a vertical line selector circuit capable of controlling a vertical thinning operation. According to the vertical thinning operation, a read operation is carried out while skipping pixel rows existing halfway in the vertical direction of an imaging area. When the foregoing vertical thinning operation is carried out, a charge is always induced in pixels of the skipped pixel rows. When a charge is continuously induced in the pixel, a phenomenon called as blooming happens; namely, the charge leaks in neighboring pixels. In order to avoid the foregoing phenomenon, in a vertical thinning read operation, a value specifying a skipping pixel row is set to a latch circuit before an electronic shutter operation. Then, the skipping pixel row selected based on the specified value is always discharged. However, there is a need to provide a latch circuit; for this reason, the circuit scale becomes large.
Moreover, when the conventional CMOS image sensor executes a simple vertical thinning process, the distance between pixels is separated; as a result, a false color is produced. This is a factor of reducing the image quality. For example, Jpn. Pat. Appln. KOKAI Publication No. 2007-173950 discloses a method of preventing an image quality from being reduced by the foregoing false color. According to the method disclosed in the foregoing Publication, signals of neighboring pixels in the vertical direction are averaged, and thereby, a captured image is reduced. This method does not thin and abandon a signal of part of pixels in the vertical direction as a thinning process, but analogically averages pixel signals of a plurality of pixels in the vertical direction using a vertical signal line and a current source. According to this method, information of pixels positioning halfway in the vertical direction is reflected; therefore, a generation of a false color is prevented. However, if the foregoing prevention is realized using the same method as above in a conventional CMOS image sensor, the following problem arises. Specifically, there is a need to change a vertical line selector circuit so that neighboring pixel rows are simultaneously driven; for this reason, the circuit scale becomes larger.